4nm

According to a report by North Korea Biz on October 20, Samsung Electronics' foundry division has seen its 4-nanometer process capacity nearing full load due to an increase in customer orders, while the company is also expanding efforts to attract new customers for its 5-nanometer process. The report states that contracts for the most advanced 2-nanometer process with major global tech companies are still delayed, prompting Samsung to increase the utilization rates of its relatively stable 4-nanometer and 5-nanometer processes to improve profitability.The 4-nanometer process is used for smartphone application processors, artificial intelligence semiconductors, and high-performance computing chips. The report indicates that not all chips in the expanding artificial intelligence semiconductor market require the most advanced processes; the manufacturing costs of 4-nanometer and 5-nanometer processes are relatively low while still achieving high performance, making them suitable for certain artificial intelligence inference chips and application-specific integrated circuits.Regarding the 2-nanometer process, Samsung is in discussions with major global tech companies about production contracts, but some negotiations are taking longer than originally expected. In addition to yield rates, the most advanced processes also require comprehensive verification of energy efficiency, design assets, and stable mass production capabilities, which means a longer time frame from contract signing to mass production. Samsung views the 2-nanometer process as the core growth driver for its next-generation foundry business and plans to continue using the fully surrounded gate transistor structure first introduced in the 3-nanometer process to improve energy efficiency and performance.

According to Money Today on September 21, Samsung Electronics is advancing the expansion of advanced process capacity in wafer foundry due to the growth of the HBM market. To meet the rising demand for HBM4 base chips, it is evaluating the expansion of its 4-nanometer process. Samsung's HBM4 consists of 10-nanometer 6th generation (1c) DRAM core chips and 4-nanometer logic base chips, with the base chips responsible for high-speed data exchange with AI accelerators such as GPUs.Unlike SK Hynix, which uses TSMC's 12-nanometer process for HBM4 base chips, Samsung employs its own 4-nanometer process. This production line is operating at full capacity and has taken on orders from companies like Nvidia and Groq for 3 LPU, and the company has recently raised its prices for new 4-nanometer orders and HBM4 base chips. Samsung expects HBM4 revenue in the third quarter to increase more than threefold quarter-on-quarter, with HBM4 accounting for significantly more than 60% of HBM revenue in the second half of the year. The additional expansion at P4 in Pyeongtaek will mostly be used for 1c DRAM for HBM, with more than half of the wafer foundry's 4-nanometer capacity allocated to HBM4 base chips.HBM4E also uses 4-nanometer base chips, and Samsung provided samples to customers in May. The company is also evaluating the construction of a new 2-nanometer production line for HBM5, aiming for a GAA structure 2-nanometer process and increasing TSV density to improve operating speed by more than 50% compared to HBM4E. Samsung started the first generation of 2-nanometer mass production in the second half of last year and is advancing the second generation of products in the second half of this year. Citigroup expects global HBM bit demand to reach 75.2 billion Gb next year, a year-on-year increase of 62%, with supply around 59.4 billion Gb and a gap of about 21%.

Samsung Electronics' wafer foundry division has recently surpassed 50% in the allocation of production capacity for the sixth-generation high bandwidth memory HBM4 substrate chips in the 4-nanometer process. The industry states that this division will invest more than half of its 4-nanometer wafers into HBM4 substrate chip manufacturing in the second half of this year to expand supply to companies like NVIDIA, Broadcom, and AMD.Samsung initiated mass production and shipment of HBM4 in February this year and plans to increase supply starting from the third quarter, significantly increasing the related wafer input since mid-year. This chip is based on Samsung's wafer foundry 4-nanometer (SF4) process. As of last month, over 50% of its total 4-nanometer capacity has been allocated to HBM4 substrate chips. According to insiders, Samsung's 4-nanometer process is currently at full capacity, with HBM4 substrate chips accounting for about 50% to 60%, and this high proportion will be maintained in the second half of the year.Samsung's wafer foundry production lines at Pyeongtaek Plant 2 and Plant 3 are mass-producing processes ranging from 4 to 7 nanometers, with a monthly capacity of about 30,000 wafers for the 4-nanometer process. Based on this, the wafer input related to HBM4 substrate chips is estimated to be about 15,000 wafers per month. During the second quarter earnings call, Samsung stated that it expects HBM4 revenue to increase more than threefold quarter-over-quarter in the third quarter, with HBM4 revenue in the second half expected to exceed 60% of the company's overall HBM revenue.

According to South Korean media ZDNet Korea, Samsung Electronics' 4nm wafer foundry capacity is fully loaded until next year, mainly driven by a surge in HBM4 orders and unexpected orders for LPU "Grok3" from Nvidia for inference. To address the capacity bottleneck, Samsung is actively recommending the validated 5nm process as an alternative to customers. This process was originally aimed at automotive chips and is now expanding into the server and high-performance AI/NPU chip sectors.The report states that in the recent 3-4 months, demand for 5nm from customers has significantly increased, mainly from Chinese and Indian fabless companies that have shifted due to tight supply of advanced processes from TSMC and geopolitical factors. Additionally, inquiries from customers regarding the 2nm process are also ongoing.