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On September 8, TSMC announced that starting in 2030, it will adopt a new "high NA" extreme ultraviolet (EUV) lithography machine manufactured by ASML from the Netherlands for mass production. Both parties also stated that they will carry out industry-wide improvements on the high NA machines. ASML monopolizes the supply of EUV lithography machines used to form nanoscale ultra-fine circuits and will begin shipping high NA machines capable of drawing finer circuits starting in December 2023. Intel has already introduced high NA machines, while TSMC previously delayed mass production due to high costs and other reasons.TSMC and ASML will launch an industry-wide project to enlarge the photomask, which serves as the original circuit pattern, from the current 6-inch (approximately 15 centimeters) square to a 12-inch square, and develop high NA machines and related components corresponding to the large masks. A large mask pilot production line is planned to be established before 2031, and the high NA machines corresponding to the large masks are expected to reach a state suitable for advanced semiconductor production before 2033. Major semiconductor manufacturers and mask companies have expressed interest in participating.High NA machines can draw finer circuits, but the area that can be drawn in a single exposure is reduced to half that of traditional models, requiring multiple exposures for large chip circuits, which complicates the process and increases costs. Enlarging the photomask can expand the exposure area and reduce costs. TSMC Chairman and CEO C. C. Wei stated that the company will gather expertise from the entire industry to continuously promote technological innovation that makes advanced technology widely usable and convey its benefits.

ASML stated that it plans to collaborate with its major customers to develop new solutions capable of producing advanced chip manufacturing equipment to meet the demand for large data center chips designed by companies like NVIDIA.Currently, the extreme ultraviolet (EUV) lithography machines produced by ASML, which are widely used, can manufacture chips with a maximum area of about 800 square millimeters. The next-generation "high numerical aperture" EUV lithography machine that ASML is about to launch will be able to produce finer chips. However, due to its use of smaller mask sizes, it is currently limited in the area of chips it can manufacture.ASML plans to showcase a pilot production line using larger mask sizes by 2031 and aims to enable this new technology for mass production by 2033.

According to Bloomberg, UBS analysts expect that China's semiconductor manufacturing capabilities may struggle to make sufficient progress in the next decade to develop solutions that can truly replace ASML's cutting-edge EUV lithography technology. UBS analysts wrote in their report, "The stage they are currently at seems comparable to ASML's in 2004." Based on patent application activities, especially in the fields of light sources and laser subsystems, China's current technological maturity is roughly equivalent to ASML's level 15 years before it began mass production of EUV equipment.UBS also expects that China is likely to have the capability for mass production of immersion DUV lithography machines within the next two to five years. Although immersion DUV is not as advanced as EUV, it remains an indispensable tool in chip manufacturing. ASML's immersion DUV machines are priced at nearly $90 million, while EUV equipment costs over $200 million each. China is one of ASML's largest markets, but due to export restrictions, ASML is prohibited from selling EUV equipment to China. UBS pointed out that considering the yield and capacity gaps and regulatory restrictions, Chinese lithography equipment is unlikely to be applied overseas. An ASML spokesperson did not respond to requests for comment. The report is based on UBS analysts' predictive views, and actual progress will depend on industry dynamics.

Park Chang-min from Samsung Electronics Semiconductor Research Institute's Foundry Process Development Team stated at the "2026 Next Generation Lithography + Patterning Academic Conference" that the company plans to apply High-NA EUV technology starting from the 1-nanometer (A10) process, aiming for mass production around 2030. Samsung is currently still using the existing 0.33 NA EUV multiple patterning scheme for processes at 2 nanometers and below, with plans to achieve mass production of 1.4 nanometers by 2029, and then advance to 1 nanometer.High-NA EUV will increase the lens numerical aperture (NA) from 0.33 to 0.55, providing higher resolution, which can simplify ultra-fine processes that originally required multiple patterning into single patterning, helping to reduce manufacturing costs, improve production efficiency, and enhance design flexibility. However, this technology is highly challenging, equipment is expensive, and it requires simultaneous upgrades in supporting material technologies. Park Chang-min expects that the 1.4 nanometer and 1 nanometer processes will still primarily use 0.33 NA EUV multiple patterning, after which High-NA patterning will become the core technology of the new generation processes.

ChainCatcher news, according to Jinshi reports, the incoming ECB board member Kocher stated that regarding the September meeting, it is still necessary to maintain policy maneuvering space to respond to various possible situations unless the data clearly sends some strong signals.

ChainCatcher message, the MSCI Emerging Markets Currency Index reached a one-week high on Friday. Alex Wolf, Head of Asian Investment Strategy at JPMorgan Private Bank, stated: "Against the backdrop of slowing trade, the broad weakening of the dollar has made the monetary policy outlook for emerging market central banks clearer. As global investors are disappointed with the exceptionalism of the U.S., capital outflows have driven the dollar weaker, which has boosted emerging market currencies (with a few exceptions), providing more room for central banks to formulate policies."

ChainCatcher news, Trusta's Chief Technology Officer Simon posted on social media that the multiplier rule in the airdrop allocation design of ZKsync and LayerZero will exacerbate airdrop polarization and has potential actionable space.Simon stated that while he fully understands the project's emphasis on certain types of transactions, assets, and wallets, the use of multiplication or addition rules in airdrop design is still worth discussing.