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first_img Samsung's 4-nanometer production capacity is more than half used for HBM4 substrate chips

Samsung Electronics' wafer foundry division has recently surpassed 50% in the allocation of production capacity for the sixth-generation high bandwidth memory HBM4 substrate chips in the 4-nanometer process. The industry states that this division will invest more than half of its 4-nanometer wafers into HBM4 substrate chip manufacturing in the second half of this year to expand supply to companies like NVIDIA, Broadcom, and AMD.Samsung initiated mass production and shipment of HBM4 in February this year and plans to increase supply starting from the third quarter, significantly increasing the related wafer input since mid-year. This chip is based on Samsung's wafer foundry 4-nanometer (SF4) process. As of last month, over 50% of its total 4-nanometer capacity has been allocated to HBM4 substrate chips. According to insiders, Samsung's 4-nanometer process is currently at full capacity, with HBM4 substrate chips accounting for about 50% to 60%, and this high proportion will be maintained in the second half of the year.Samsung's wafer foundry production lines at Pyeongtaek Plant 2 and Plant 3 are mass-producing processes ranging from 4 to 7 nanometers, with a monthly capacity of about 30,000 wafers for the 4-nanometer process. Based on this, the wafer input related to HBM4 substrate chips is estimated to be about 15,000 wafers per month. During the second quarter earnings call, Samsung stated that it expects HBM4 revenue to increase more than threefold quarter-over-quarter in the third quarter, with HBM4 revenue in the second half expected to exceed 60% of the company's overall HBM revenue.

first_img Lei Jun announces the release of the Xuanjie O3, O100, and D100 chips

Lei Jun announced that Xiaomi's new generation of the Xuanjie family of chips, Xuanjie O3, Xuanjie O100, and Xuanjie D100, have all completed back-plate verification. Xuanjie O3 is an AI flagship SoC aimed at the highest-end products and will debut on the Xiaomi 18 Fold; Xuanjie O100 is a 1.22TB/s high-bandwidth AI acceleration chip, and Xuanjie D100 is the first domestic 3nm intelligent driving high-performance AI chip, with the latter two set to officially launch next year. The three chips cover the AI computing power needs of Xiaomi's entire ecosystem of people, vehicles, and homes.Xuanjie O3 uses a 3nm process, has an area of 133mm², and a transistor count of 24 billion, which is a 26% increase over the previous generation, with an AnTuTu extreme score reaching 5.22 million. The CPU features a ten-core all-large-core design, with a maximum frequency of 4.35GHz, Geekbench single-core score of 3945, and multi-core score exceeding 15000; the GPU has 16 cores and supports ray tracing, with significant improvements in multiple graphics performance metrics and a 64% reduction in power consumption compared to the previous generation. This chip is the industry's first to support LPDDR6, with an NPU tensor computing power of 200TOPS, and is specifically optimized for large language model inference.Xuanjie O100 is the world's first 6nm 3D wafer-level stacked AI acceleration chip, utilizing wafer-on-wafer packaging and hybrid bonding, with two layers of AI-specific high-speed DRAM and one layer of high-performance NPU stacked vertically, achieving a bandwidth of 1.22TB/s. Together with O3, it can achieve a maximum local AI inference speed of 330 Tokens/s. Xiaomi has restarted its large chip research and development for over five years, with a cumulative investment exceeding 21 billion yuan and a chip team of nearly 3000 people.
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